As desclosed in Japanese Laid-Open Patent Application (Kokai) No. 138371/1981, there has been conventionally considered a solid state image sensor such as a CCD or the like in which in order to prevent blooming, excess carriers are extinguished by use of surface recombination, in place of providing an overflow drain in the photodetecting surface.
Image sensors using this method have the advantages that sensitivity is high, since the aperture ratio in the photodetecting surface is not sacrificed, and horizontal resolution is raised, since the degree of integration can be improved, and the like
FIGS. 1 to 3 are diagrams for explaining such a method of preventing the blooming by means of surface recombination. FIG. 1 is a front view of a general frame transfer type CCD.
In the diagram, a photodetector 1 consists of a plurality of vertical shift registers having photosensitivity.
A storage section 2 consists of a plurality of vertical shift registers which are shielded from light.
Reference numeral 3 denotes a horizontal shift register. The information in each vertical shift register in the storage section 2 can be taken in this horizontal shift register by simultaneously shifting the contents of the vertical registers one bit, and then a video signal can be derived from an output amplifier 4 by allowing the register 3 to perform the horizontal transfer operation.
Generally, the information formed in each vertical shift register of the photodetector 1 is vertically transferred to the storage section 2 within the vetical blanking interval in the standard television aystem and is sequentially read out line by line by the horizontal shift register 3 during the next vertical scan interval.
It is now assumed that the photodetector 1, storage section 2 and horizontal shift register 3 are respectively two-phase driven and respective transfer electrodes are P.sub.1, P.sub.2, P.sub.3, P.sub.4, P.sub.5, and P.sub.6, and their transfer clocks are (.phi.P.sub.1, .phi.P.sub.2), (.phi.P.sub.3, .phi.P.sub.4), and (.phi.P.sub.5, .phi.P.sub.6).
FIG. 2 is a diagram showing a potential profile below such transfer electrodes P.sub.1 to P.sub.6. A low potential portion and a high potential portion with regard to the electrons are formed due to ion implantation or the like below each electrode which is provided, for example, over a P-type silicon substrate 6 through an insulation layer 5. For instance, when a low level voltage -V.sub.1 is applied to the electrodes P.sub.2, P.sub.4 and P.sub.6 and a high level voltage V.sub.2 is applied to the electrodes P.sub.1, P.sub.3 and P.sub.5, the potentials as indicated by a solid line in the diagram are formed. On the contrary, when the low level voltage -V.sub.1 is applied to the electrodes P.sub.1, P.sub.3 and P.sub.5 and the high level voltage V.sub.2 is applied to the electrodes P.sub.2, P.sub.4 and P.sub.6, the potentials indicated by a broken line in the diagram are formed.
The carriers are, therefore, sequentially transferred in one direction (to the right in the diagram) by applying the alternating voltage to the electrodes P.sub.1, P.sub.3, P.sub.5 and to the electrodes P.sub.2, P.sub.4, P.sub.6 in such a manner as to have the opposite phase to each other.
On the other hand, an alternate long and short dash line in the diagram represents the potentials which are formed in the case of applying a large positive voltage V.sub.3 to the electrodes. These potential wells are in the inverted states, so that the excess carriers over a predetermined quantity will have been extinguished because of recombining with the majority carriers.
FIG. 3 is a diagram showing the relationship between the electrode voltage and the shape of the internal potential as mentioned above with respect to the direction of the thickness of the semiconductor substrate 6. As shown in the diagram, the potential well is shallow with regard to the electrode voltage of V.sub.3 and the excess carriers enter the second state in that they recombine with the majority carriers at the interface with the insulation layer.
On the other hand, the accumulation state as the first state occurs at the electrode voltage of -V.sub.1. In this state, the majority carrier can be easily collected around the interface and, for instance, this majority carrier is supplied from a channel stopper region (not shown).
Consequently, for example, in the state in which a barrier is formed by applying the voltage -V.sub.1 to the electrode P.sub.2, by alternately applying the voltages -V.sub.1 and V.sub.3 to the electrode P.sub.1, the minority carrier which is stored below the electrode P.sub.1 is restricted to less than a predetermined quantity.
However, such an image sensor using charge recombination has a drawback that a clock signal for the recombination is mixed with an output signal and becomes noise.
In addition, in order to effectively extinguish the excess carriers, the accumulation state and inversion state are alternately formed at a high speed in the semiconductor substrate during the accumulation interval, thereby causing a problem of large electric power consumption. There is also a problem that in the case where such pulse control is performed at a high speed, the noise due to this pulse is mixed with the signal.
FIGS. 4A and 4B are diagrams for explaining such problems. In the diagrams, reference numeral 100 denotes a part of a driver circuit which will be explained below. This driver circuit 100 supplies a drive pulse (hereinbelow, referred to as an AB pulse .phi..sub.AB) at predetermined P(peak)-P(peak) levels of -V.sub.1 and V.sub.3 in response to a timing of a pulse .PSI..sub.AB from a clock generator mentioned later.
Reference numerals 101 and 109 represent differentiating capacitors; 102 and 108, biasing diodes; 104 and 107, transistors; 103 and 106, smoothing capacitors; and 105, a capacitor.
FIG. 4B is a diagram showing waveforms in the respective sections. The operation of the circuit of FIG. 4A will now be described with reference to FIG. 4B.
As shown in FIG. 4B, when the pulse .PSI..sub.AB is inputted, the transistor 107 is turned on in response to the leading edge of this pulse, so that a current i.sub.AB flows from the capacitor 105 toward the power source -V.sub.1 and the power source -V.sub.1 is applied to and charges the capacitor 105.
In addition, the transistor 104 is turned on in response to the leading edge of the pulse .PSI..sub.AB, so that the voltage of the power source +V.sub.3 is applied to and charges the capacitor 105 and to this voltage V.sub.3. In this case, since the capacitance of the capacitor 105 is equivalent to the input capacitance of several thousands of PF (picofarads), if the pulse at the voltage levels of -V.sub.1 and V.sub.3 (hereinbelow, referred as the AB pulse .phi..sub.AB) is supplied, a differentiation current of the order of a few A (amperes) will have flowed instantaneously. When this current flows through the silicon substrate of the image sensor, noise of several tens of mV (millivolts) (referred to hereinafter as the AB noise) will have been eventually caused since the resistance of the silicon substrate has a value of several tens of m.OMEGA. (milliohms). To reduce this noise, a method is considered wherein the absolute value of the differentiation current is made small by making the resistance of the silicon substrate small or by making smooth the leading and trailing characteristics of the AB pulse. However, the AB noise at a few mV remains even due to those methods.
On the other hand, a standard level of a signal which is generated from an image sensor is ordinarily several hundreds of mV, and a general video signal level likewise reaches a value of the order of about 100 mV in the case where the dynamic range during image pickup operation is set to a value which is about four times the standard signal level.
Consequently, in an ordinary movie image pickup mode, particularly, in the case of a dark subject, the foregoing AB noise reaches a level of an order at which it cannot be ignored and appears on the display.
In an output signal of an image sensor, the signal corresponding to the portion OB, which is optically shielded from the light, is generally clamped as an optical black reference signal by a DC reproducing circuit called a clamp circuit. When a pulse is supplied for the interval of this optical black reference signal, the AB noise is added to the optical black reference signal. Thus, the clamping of this signal causes a variation in clamp potential due to the AB noise. This variation results in the low frequency noise like a line on the display and causes the image quality to be remarkably deteriorated.
Although the variation ratio of the clamp potential is not determined merely by the ratio between the foregoing standard signal level (100 mV) and the level of the AB noise (a few mV), it has been confirmed that the noise at several tens of mV as a level of the NTSC signal remains even when consideration is taken of the clamp effect, gamma characteristic or the like. Such phenomenon is particularly remarkable in the case: where the AB pulse .phi..sub.AB is a synchronous with the TV synchronizing signal (for example, horizontal synchronizing signal); where the repetitive period of the AB pulse is changed in dependence upon a luminance level or the like of a subject; where the phases of the clamp pulse and of the AB noise vary, or the like. In this case, there is a drawback such that the luminance level changes for a several H (exposure value) few.